This needs: - a whitebox codegen test case (ideally several, to cover the several cases) - a solution for the SIMD case, because that actually matters - a solution for the FP case that does not include int<->fp moves (probably what solves the SIMD case will solve this case too) I would expect memory to memory FP moves to be rare, and if so it would be better for those to use the GPR scratch (SIMD would require two loads and two stores) if that allows the FP scratch to be used for optimizing FP and SIMD moves in most cases.
Bug 1713180 Comment 8 Edit History
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This needs: - a whitebox codegen test case (ideally several, to cover the several cases) - a solution for the SIMD case, because that actually matters - a solution for the FP case that does not include int<->fp moves (probably what solves the SIMD case will solve this case too) I would expect memory to memory FP moves to be rare, and if so it would be better for those to use the GPR scratch (SIMD would require two loads and two stores) if that allows the FP scratch to be used for optimizing FP and SIMD moves in most cases - assuming it's possible of course to make the logic work out.