Closed Bug 604335 Opened 14 years ago Closed 14 years ago

asm_nongp_copy doesn't support move between GpRegs and FpRegs on SPARC

Categories

(Core Graveyard :: Nanojit, defect)

Sun
OpenSolaris
defect
Not set
normal

Tracking

(Not tracked)

RESOLVED FIXED

People

(Reporter: ginnchen+exoracle, Assigned: ginnchen+exoracle)

Details

(Whiteboard: fixed-in-nanojit, fixed-in-tracemonkey. fixed-in-tamarin)

Attachments

(1 file)

Found by lirasm random tests with debug version.
Attached patch patchSplinter Review
Not sure if we need the same for ARM.
Assignee: nobody → ginn.chen
Status: NEW → ASSIGNED
Attachment #483136 - Flags: review?(edwsmith)
Comment on attachment 483136 [details] [diff] [review]
patch

Seems harmless enough.  Does one of the existing lirasm test cases require this fix?  if not, could you add a new test case to ensure the fix is tested on sparc?
Attachment #483136 - Flags: review?(edwsmith)
Attachment #483136 - Flags: review+
Attachment #483136 - Flags: feedback?(Jacob.Bramley)
Comment on attachment 483136 [details] [diff] [review]
patch

Why is the #elif in there in the first place?   It should be #else 

BTW, we should be trying to eliminate any platform specific code from Assembler.  The i386 stuff in there is a regrettable artifact of supporting x87 fpu.
(In reply to comment #1)
> Not sure if we need the same for ARM.

I don't think it makes sense for ARM. We can't move a 64-bit float into a 32-bit integer register. Floating point and integer quantities are completely separated in almost all of the code.

On that note, I don't think it makes sense for MIPS either, but I don't know how their back-end does things so it might have some behaviour requiring that code.
Comment on attachment 483136 [details] [diff] [review]
patch

I don't know SPARC, but we don't want ARM on the list.
Attachment #483136 - Flags: feedback?(Jacob.Bramley) → feedback+
(In reply to comment #3)
> Why is the #elif in there in the first place?   It should be #else 

I disagree, as this code is not applicable to processors with 32-bit general-purpose registers. See comment #4.
(In reply to comment #6)
> (In reply to comment #3)
> > Why is the #elif in there in the first place?   It should be #else 
> 
> I disagree, as this code is not applicable to processors with 32-bit
> general-purpose registers. See comment #4.

Then why is this code here at all? 

The caller is expecting to move data from one register set to another.  If we want to support this 'optimization' then lets be more explicit about it.   A back-end method to query allowMovesAcrossRegisterSets() which then falls into the asm_nongp_copy() case.

For the #elif portion, we're expecting to do the move via spilling across the stack, which as you mentioned is only valid if the registers sets are of equal sized storage.  For which we can have an assert.

All of this is outside of the fix that Ginn should be providing, but if this sounds correct, I'll open a bug on it.
(In reply to comment #4)
> (In reply to comment #1)
> > Not sure if we need the same for ARM.
> 
> I don't think it makes sense for ARM. We can't move a 64-bit float into a
> 32-bit integer register. Floating point and integer quantities are completely
> separated in almost all of the code.

That's exact why we need the code and this patch.

I guess the title of this bug is misleading.
The patch is not going to implement moving between Gp and Fp for asm_nongp_copy.
The code is to avoid moving between registers if they're different types.
http://hg.mozilla.org/projects/nanojit-central/rev/004571303a08
Whiteboard: fixed-in-nanojit
http://hg.mozilla.org/tracemonkey/rev/aedbe1e95c92
Whiteboard: fixed-in-nanojit → fixed-in-nanojit, fixed-in-tracemonkey
http://hg.mozilla.org/mozilla-central/rev/aedbe1e95c92
Status: ASSIGNED → RESOLVED
Closed: 14 years ago
Resolution: --- → FIXED
http://hg.mozilla.org/tamarin-redux/rev/172dfb67c782
Whiteboard: fixed-in-nanojit, fixed-in-tracemonkey → fixed-in-nanojit, fixed-in-tracemonkey. fixed-in-tamarin
Product: Core → Core Graveyard
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