Open Bug 1088598 Opened 5 years ago Updated 3 years ago

Better instruction selection for ARMv7 compareExchange


(Core :: JavaScript Engine: JIT, enhancement, P5)





(Reporter: lth, Unassigned)


(Blocks 1 open bug)


See and later: the sign extend operations are not necessary so we can save at least one instruction.  (And hence we may be able to save a register and hence we may be able to hoist some operations out of the loop, on redo.)
Specifically, the current code is this:

     ...    ptr, <addr>         ; compute address of item
 L0  ldrex* output, [ptr]
     sxt*   output, output, 0   ; sign-extend if applicable
     *xt*   tmp, oldval, 0      ; sign-extend or zero-extend if applicable
     cmp    output, tmp
     bne    L1                  ; failed - values are different
     strex* tmp, newval, [ptr]
     cmp    tmp, 1
     beq    L0                  ; failed - location is dirty, retry
 L1  dmb

Several improvements are possible:

- The three-instruction sequence extend;extend;cmp can be replaced by a two-instruction sequence
  eor;leftshift+setcond and without the use of the tmp.  Sometimes the three-instruction sequence
  is just a two-instruction sequence so this is not much of a win by itself.  However:

- If oldval is a constant that will fit as an operand to the eor we can avoid allocating
  a register for it (see bug 1077317 for a similar case for the binary ops).

(In practice getting rid of tmp in the comparison isn't a big deal since it's needed for strex and since we're using the available ScratchRegister for tmp.)

After those simplifications I don't think there is any hoisting to be done.  The code is complex because it needs to redo the loop even if the strex fails, so long as the value in the cell compared equal.
See Also: → 1077317
Priority: -- → P5
Assignee: lhansen → nobody
Blocks: 1317626
No longer blocks: shared-array-buffer
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