Open
Bug 1330187
Opened 7 years ago
Updated 1 year ago
DisplayList building shows signs of poor CPU usage
Categories
(Core :: Layout, defect, P3)
Core
Layout
Tracking
()
NEW
Performance Impact | low |
People
(Reporter: bas.schouten, Unassigned)
References
(Depends on 1 open bug, Blocks 1 open bug)
Details
(Keywords: perf:resource-use)
Attachments
(1 file)
1.55 MB,
application/vnd.ms-excel
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Details |
Profiling indicates that DisplayList building is doing a lot of work during which the CPU is not retiring intructions but waiting for the Front-End and Back-End portions of the pipeline. During Scrolling on Google Docs, where display list building and processing takes a lot of the time, on my P50 the full 16 GB/s bandwidth of the DRAM bus is completely filled up, which is causing a lot of back, and we're seeing a large amount of instruction cache misses as well as a high ITLB overhead. This is likely because of accessing a lot of functions which are far apart in memory, as well as accessing a lot of objects in memory in suboptimal order. These seem to be the areas we should focus on when trying to improve display list building and processing performance.
Comment hidden (obsolete) |
Reporter | ||
Comment 2•7 years ago
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More readable and better profile data.
Updated•7 years ago
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Priority: -- → P3
Updated•2 years ago
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Performance Impact: --- → ?
Updated•2 years ago
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Keywords: perf:resource-use
Updated•2 years ago
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Performance Impact: ? → P3
Updated•2 years ago
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Severity: normal → S3
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Description
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