Closed Bug 516093 Opened 15 years ago Closed 15 years ago

NJ: Bad register allocation in NativeX64.cpp!regalloc_binary

Categories

(Core :: JavaScript Engine, defect)

x86
Linux
defect
Not set
normal

Tracking

()

RESOLVED FIXED
Tracking Status
status1.9.2 --- beta1-fixed

People

(Reporter: dvander, Unassigned)

Details

(Whiteboard: fixed-in-tracemonkey)

Attachments

(1 file)

Attached patch patchSplinter Review
regalloc_binary() shortcuts if the RHS already has a reservation with a valid register, but it doesn't make sure this register is in the allow mask. This meant the backend could try to generate code like:

addsd xmm0, r12

Which would come out as:

addsd xmm0, xmm12

This can easily happen if the previous use of the RHS is a store, and also the last use, because it will get a GPR by default.

This patch does three things:
 1. Fetches a new allowable register in the case described above.
 2. Asserts in the x64 regalloc functions that the outputs are valid.
 3. Adds a special-case hint to asm_store64, which should be a small register allocation improvement.
Attachment #400197 - Flags: review?(gal)
Comment on attachment 400197 [details] [diff] [review]
patch

You should add an assert that this fixup only happens for the few cases we know this makes sense for (quad, ldq).
Attachment #400197 - Flags: review?(gal) → review+
http://hg.mozilla.org/mozilla-central/rev/8ac0950cbd76
Status: NEW → RESOLVED
Closed: 15 years ago
Resolution: --- → FIXED
Does it also make sense for the conversion functions; i2f u2f ?
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