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ARM target (gcc 4.5.2 or later) should use built-in atomic function instead of arm-kuser

RESOLVED FIXED

Status

()

Core
JavaScript Engine
RESOLVED FIXED
6 years ago
6 years ago

People

(Reporter: m_kato, Assigned: m_kato)

Tracking

Trunk
ARM
Linux
Points:
---

Firefox Tracking Flags

(Not tracked)

Details

(Whiteboard: [fixed-in-tracemonkey])

Attachments

(1 attachment)

(Assignee)

Description

6 years ago
Now, jslock uses arm-kuser that is the atomic functions into Linux kernel.  But gcc 4.5.2 or later has __sync_bool_compare_and_swap().  We should use it.


current code,
00000000 <_Z17js_CompareAndSwapPViii>:
   0:   b5f8            push    {r3, r4, r5, r6, r7, lr}
   2:   f44f 667c       mov.w   r6, #4032       ; 0xfc0
   6:   4605            mov     r5, r0
   8:   460c            mov     r4, r1
   a:   4617            mov     r7, r2
   c:   f6cf 76ff       movt    r6, #65535      ; 0xffff
  10:   4620            mov     r0, r4
  12:   4639            mov     r1, r7
  14:   462a            mov     r2, r5
  16:   47b0            blx     r6    <---- Call kernel code
  18:   b950            cbnz    r0, 30 <_Z17js_CompareAndSwapPViii+0x30>
  1a:   f1d0 0001       rsbs    r0, r0, #1
  1e:   bf38            it      cc
  20:   2000            movcc   r0, #0
  22:   bdf8            pop     {r3, r4, r5, r6, r7, pc}
  24:   f3af 8000       nop.w
  28:   f3af 8000       nop.w
  2c:   f3af 8000       nop.w
  30:   682b            ldr     r3, [r5, #0]
  32:   429c            cmp     r4, r3
  34:   d0ec            beq.n   10 <_Z17js_CompareAndSwapPViii+0x10>
  36:   f1d0 0001       rsbs    r0, r0, #1
  3a:   bf38            it      cc
  3c:   2000            movcc   r0, #0
  3e:   bdf8            pop     {r3, r4, r5, r6, r7, pc}

after (using __sync_bool_compare_and_swap)
00000000 <_Z17js_CompareAndSwapPViii>:
   0:   f3bf 8f5f       dmb     sy
   4:   e850 3f00       ldrex   r3, [r0]
   8:   428b            cmp     r3, r1
   a:   d107            bne.n   1c <_Z17js_CompareAndSwapPViii+0x1c>
   c:   e840 2300       strex   r3, r2, [r0]
  10:   f093 0f00       teq     r3, #0
  14:   d1f6            bne.n   4 <_Z17js_CompareAndSwapPViii+0x4>
  16:   460b            mov     r3, r1
  18:   f3bf 8f5f       dmb     sy
  1c:   1a5b            subs    r3, r3, r1
  1e:   4258            negs    r0, r3
  20:   eb40 0003       adc.w   r0, r0, r3
  24:   4770            bx      lr
  26:   bf00            nop
  28:   f3af 8000       nop.w
  2c:   f3af 8000       nop.w
(Assignee)

Updated

6 years ago
Hardware: x86_64 → ARM

Comment 1

6 years ago
Nice.
(Assignee)

Comment 2

6 years ago
Created attachment 530557 [details] [diff] [review]
fix
Assignee: general → m_kato
Status: NEW → ASSIGNED
(Assignee)

Updated

6 years ago
Attachment #530557 - Flags: review?(gal)

Comment 3

6 years ago
Comment on attachment 530557 [details] [diff] [review]
fix

Cool. Thanks. I assume this is guaranteed to work with all ARM architectures we support?
Attachment #530557 - Flags: review?(gal) → review+
(Assignee)

Comment 4

6 years ago
(In reply to comment #3)
> Comment on attachment 530557 [details] [diff] [review] [review]
> fix
> 
> Cool. Thanks. I assume this is guaranteed to work with all ARM architectures
> we support?

Our target platform is ARMv7 architecture (Android, Maemo and MeeGo).

__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 is only defined when -march or -mcpu is such as ARMv7 that has barrier instructions (dmb and strex).

So if using -march=armv4t (ARMv4 Thumb), __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 isn't defined.
(Assignee)

Comment 5

6 years ago
http://hg.mozilla.org/tracemonkey/rev/9ec7a17e3136
Whiteboard: [fixed-in-tracemonkey]
cdleary-bot mozilla-central merge info:
http://hg.mozilla.org/mozilla-central/rev/9ec7a17e3136
Status: ASSIGNED → RESOLVED
Last Resolved: 6 years ago
Resolution: --- → FIXED
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