Currently the MacroAssembler only supports variable shift count arguments for the SIMD bitwise shifts. This is bad in several ways: - we do not get to use the architecture's constant-shift instructions - we must load shift count into registers - register pressure is higher than it need be - we must mask the shift count before it is used; this is redundant if it is constant (though clearly we could avoid this even while using variable-shift registers by communicating to masm that the shift count does not need masking) - byte shifts generate horrific code because they are not supported by the architecture and must be emulated with word shifts; at least if the shift counts are known, we can use other arithmetic instructions sometimes (shl by 1 is a lane-wise add, for example) We should handle at least reasonable cases of constant shifts better.
Bug 1639517 Comment 0 Edit History
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Currently the MacroAssembler only supports variable shift count arguments for the SIMD bitwise shifts. This is bad in several ways: - we do not get to use the architecture's constant-shift instructions - we must load the shift count into registers - register pressure is higher than it need be - we must mask the shift count before it is used; this is redundant if it is constant (though clearly we could avoid this even while using variable-shift registers by communicating to masm that the shift count does not need masking) - byte shifts generate horrific code because they are not supported by the architecture and must be emulated with word shifts; at least if the shift counts are known, we can use other arithmetic instructions sometimes (shl by 1 is a lane-wise add, for example) We should handle at least reasonable cases of constant shifts better.