1639517 - Optimize SIMD shifts in Ion x86_64

Status: RESOLVED FIXED

(Core :: JavaScript: WebAssembly, enhancement, P2)

Description

[Lars T Hansen [:lth]]

Currently the MacroAssembler only supports variable shift count arguments for the SIMD bitwise shifts. This is bad in several ways:

• we do not get to use the architecture's constant-shift instructions
• we must load the shift count into registers
• register pressure is higher than it need be
• we must mask the shift count before it is used; this is redundant if it is constant (though clearly we could avoid this even while using variable-shift registers by communicating to masm that the shift count does not need masking)
• byte shifts generate horrific code because they are not supported by the architecture and must be emulated with word shifts; at least if the shift counts are known, we can use other arithmetic instructions sometimes (shl by 1 is a lane-wise add, for example)

We should handle at least reasonable cases of constant shifts better.

Comment 1

[Lars T Hansen [:lth]]

Block on the shuffle patch so that we can use the optimization tracking framework for testing.

Comment 2

[Lars T Hansen [:lth]]

Attachment: Bug 1639517 - wasm ion simd: optimize shifts. r=jseward

Comment 3

[Pulsebot]

Pushed by [e-mail]:
https://hg.mozilla.org/integration/autoland/rev/7a6cac6f591d
wasm ion simd: optimize shifts. r=jseward

Comment 4

[Cristina Coroiu [:ccoroiu]]

https://hg.mozilla.org/mozilla-central/rev/7a6cac6f591d