fix regalloc constraints for SIMD ternary bitwise operator

RESOLVED DUPLICATE of bug 1100123

Status

()

Core
JavaScript Engine: JIT
RESOLVED DUPLICATE of bug 1100123
3 years ago
a year ago

People

(Reporter: sunfish, Assigned: sunfish)

Tracking

Firefox Tracking Flags

(Not tracked)

Details

Attachments

(1 attachment)

(Assignee)

Description

3 years ago
Created attachment 8533450 [details] [diff] [review]
select-lowering.patch

Currently, the register allocator requires reused inputs to be at-start, and any input in an instruction which also has reused inputs to not be at-start. This is because it may insert a copy from the reused input to the output register before the instruction, which would clobber any at-start operands. This limitation should ideally be fixed, but for the present, this patch fixes the ternary bitwise operator to use at-start according to the present rules.
Attachment #8533450 - Flags: review?(benj)
Comment on attachment 8533450 [details] [diff] [review]
select-lowering.patch

Review of attachment 8533450 [details] [diff] [review]:
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So regalloc has another constraint, if i remember correctly, that if an operand is used twice in an instruction (e.g. here, operands 1 and 2 could be the same -- I agree it would be stupid for the case of select, but we can't prevent stupid things at this level), uses must be either all at-start or all non-start, but mixed useAtStart and use are not allowed. Is that still true? If it's the case, I think we need to have a condition as in x86's lowerForFPU in the non AVX case. Please fix if necessary, and r=me in all cases.
Attachment #8533450 - Flags: review?(benj) → review+
(Assignee)

Comment 2

3 years ago
Arg. There are some conflicting rules here. I've fixed this in a more comprehensive way in bug 1100123.
Group: core-security
Status: NEW → RESOLVED
Last Resolved: 3 years ago
Resolution: --- → DUPLICATE
Duplicate of bug: 1100123

Updated

2 years ago
Group: core-security → core-security-release
Group: core-security-release
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