1678083 - Investigate Using Low Power Cores for Some Threads on Apple Silicon

Status: NEW

(Core :: Widget: Cocoa, enhancement, P2)

Description

[Haik Aftandilian [:haik]]

We should investigate using low power cores (E cores) for some background tasks.

From Apple's Optimize for Apple Silicon with performance and efficiency cores doc, "Recent Apple Silicon like A13 Bionic has both high-performance cores (P cores) and high-efficiency cores (E cores). These different core types allow you to deliver apps that have both great performance and great battery life. To take full advantage of their performance and efficiency, you can provide the operating system (OS) with information about how to execute your app in the most optimal way. From there, the OS uses semantic information to make better scheduling and performance control decisions."

Comment 1

[Markus Stange [:mstange]]

Would this fit into our plans for the scheduler? Will "background tasks" use a different thread that we could put on an efficiency core?

Comment 2

[Jeff Muizelaar [:jrmuizel]]

Do we know how to tell the OS this information?

Comment 3

[Markus Stange [:mstange]]

Tuning Your Code’s Performance for Apple Silicon mentions pthread_set_qos_class_self_np.

Comment 4

[Markus Stange [:mstange]]

We could also use this for de-prioritized content processes, such as background tabs or ads.

Comment 5

[Mike Hommey [:glandium]]

Note that Fenix could benefit from that too. So does Windows for arm64. (assuming OS support)

Comment 6

[Haik Aftandilian [:haik]]

Attachment: The 4 iOS QoS Classes Available on iOS (assumed to be available on macOS too)

From https://developer.apple.com/library/archive/documentation/Performance/Conceptual/power_efficiency_guidelines_osx/PrioritizeWorkAtTheTaskLevel.html, these are the 4 QoS classes on iOS. We'll have to verify what is available on macOS.

Comment 7

[Kris Wright :KrisWright]

We could certainly teach nsThreadPool or at least the background event target to dispatch to the lower-priority cores (either as a whole or with a certain flag/thread). I'm curious if this would be impactful at all. Are there any particular consumers in mind who could get some quick wins out of the efficiency guidelines?

Comment 8

[Bas Schouten (:bas.schouten)]

(In reply to Markus Stange [:mstange] from comment #1)

Would this fit into our plans for the scheduler? Will "background tasks" use a different thread that we could put on an efficiency core?

There's a lot of ways to do this, one of the things we could do is run two threadpools inside the scheduler in parallel, and make it depend on the priority. We could also do something more explicit, presumably set through a TaskManager or something along those lines.

But my intuition is that once we properly define priority, low priority would be a good proxy for things which may be run on more efficient cores with lower throughput. Having said that, currently that information doesn't exist.

Comment 9

[Bas Schouten (:bas.schouten)]

(In reply to Bas Schouten (:bas.schouten) from comment #8)

(In reply to Markus Stange [:mstange] from comment #1)

Would this fit into our plans for the scheduler? Will "background tasks" use a different thread that we could put on an efficiency core?

There's a lot of ways to do this, one of the things we could do is run two threadpools inside the scheduler in parallel, and make it depend on the priority. We could also do something more explicit, presumably set through a TaskManager or something along those lines.

But my intuition is that once we properly define priority, low priority would be a good proxy for things which may be run on more efficient cores with lower throughput. Having said that, currently that information doesn't exist.

Fwiw, there's good reasons to want to think about this since Intel Lakefield uses a heterogeneous architecture as well and Intel announced a similar architecture for Alder Lake. Which I believe is scheduled for H2 2021.

The Windows scheduler generally decides on its own which cores are best suited for which thread on a heterogeneous architecture. But I believe explicitly selecting them should be possible with a combination of the information given by SYSTEM_CPU_SET_INFORMATION and SetThreadAffinityMask.

Comment 10

[Sylvestre Ledru [:Sylvestre]]

Probably not a S2
Reminder, S2 means: (Serious) Major functionality/product severely impaired or a high impact issue and a satisfactory workaround does not exist