Closed Bug 1678542 Opened 6 months ago Closed 4 months ago

Random ARM64 fixes

Categories

(Core :: Javascript: WebAssembly, defect, P3)

ARM64
All
defect

Tracking

()

RESOLVED FIXED

People

(Reporter: lth, Assigned: lth)

References

Details

Attachments

(8 files, 1 obsolete file)

Various fixes for bugs and poor code I've come across while investigating bug 1678097.

branchTestPtr can be optimized in the manner of branchTest32, using CBZ/CBNZ
when the inputs are the same and we're testing for zero/nonzero.

Also tidy up the logic of branchTest32 to make it slightly easier to understand.

This is not a functional change but allows switches to be emitted for wasm:
wasm disallows the use of an ImmPtr for movePatchablePtr but allows ImmWord,
this is in order to guard against embedded pointers in the serializable
machine code. For a patchable word that will always be patched after
code is deserialized, we can use ImmWord, as we do on other platforms.

Depends on D97770

Attached file Bug 1678542 - Always sync the SP (WIP) (obsolete) —

Every operation that updates the SP must be sure to sync the SP. Various
addToStackPtr APIs did not do this.

Depends on D97771

Blocks: 1680968

ARM64 inherited the wasmLoad / wasmStore API from ARM and MIPS wherein
the ptr register is clobberable by the macroassembler, so as to avoid
allocating a temp register. On ARM64 there are several temp registers,
so this is not necessary, and we can generate better code (from Ion)
by not clobbering.

Depends on D97771

Attachment #9189166 - Attachment description: Bug 1678542 - Optimize branchTestPtr. → Bug 1678542 - Optimize branchTestPtr on ARM64. r?nbp
Attachment #9189167 - Attachment description: Bug 1678542 - Placeholder for patchable label must be ImmWord, not ImmPtr. → Bug 1678542 - Placeholder for patchable label on ARM64 must be ImmWord, not ImmPtr. r?nbp
Attachment #9191523 - Attachment description: Bug 1678542 - Don't clobber ptr for load/store. → Bug 1678542 - Don't clobber ptr register for ARM64 load/store. r?nbp
Keywords: leave-open
Pushed by lhansen@mozilla.com:
https://hg.mozilla.org/integration/autoland/rev/d84189f9e733
Optimize branchTestPtr on ARM64.  r=nbp
https://hg.mozilla.org/integration/autoland/rev/f49a0516ef05
Placeholder for patchable label on ARM64 must be ImmWord, not ImmPtr. r=nbp
https://hg.mozilla.org/integration/autoland/rev/10cf061462ef
Don't clobber ptr register for ARM64 load/store.  r=nbp

Depends on D100025

Depends on D100112

Depends on D100113

Attachment #9193919 - Attachment description: Bug 1678542 - Fix ARM64 NegD and NegF output register. → Bug 1678542 - Fix ARM64 NegD and NegF output register. r?nbp
Attachment #9193920 - Attachment description: Bug 1678542 - Add env var to trace execution of ARM64 SIM. → Bug 1678542 - Add env var to trace execution of ARM64 SIM. r?nbp
Attachment #9193917 - Attachment description: Bug 1678542 - Add missing ARM64 porting APIs. → Bug 1678542 - Add missing ARM64 porting APIs. r?nbp
Attachment #9193918 - Attachment description: Bug 1678542 - ARM64 UDivConstantI must Lsr, not Asr. → Bug 1678542 - ARM64 UDivConstantI must Lsr, not Asr. r?nbp
Attachment #9189168 - Attachment description: Bug 1678542 - Always sync the SP. → Bug 1678542 - Always sync the SP (WIP)
Pushed by lhansen@mozilla.com:
https://hg.mozilla.org/integration/autoland/rev/afb6bb63b47b
Fix ARM64 NegD and NegF output register. r=nbp
https://hg.mozilla.org/integration/autoland/rev/812fbada4509
Add env var to trace execution of ARM64 SIM. r=nbp
https://hg.mozilla.org/integration/autoland/rev/8a7adcf1b8cf
Add missing ARM64 porting APIs. r=nbp
https://hg.mozilla.org/integration/autoland/rev/e21ef34b502a
ARM64 UDivConstantI must Lsr, not Asr. r=nbp
Status: ASSIGNED → RESOLVED
Closed: 4 months ago
Resolution: --- → FIXED

Comment on attachment 9189168 [details]
Bug 1678542 - Always sync the SP (WIP)

Revision D97772 was moved to bug 1678097. Setting attachment 9189168 [details] to obsolete.

Attachment #9189168 - Attachment is obsolete: true

This was supposed to have landed with the bugfix. The bug
was that NegD and NegF chose their output register to be
their input register always, ignoring the output register
selected by the register allocator.

Depends on D100655

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