Bug 1687629 implements Ion non-optimized operations. The current code is using temporary register to load a lane and then replace it the SIMD register (for load), and extracting lane and then storing it.
The https://github.com/WebAssembly/simd/pull/350 recommends usage of LD1 / ST1 instructions. Though there is a limit: there is not encoding for memory referred via base register value and an offset register (which we use).
Check if it is possible to optimize load/store lane operations.