Closed
Bug 1710882
Opened 4 years ago
Closed 3 years ago
SIMD shuffle optimizations for reverse bytes ops
Categories
(Core :: JavaScript: WebAssembly, enhancement, P3)
Tracking
()
RESOLVED
FIXED
95 Branch
| Tracking | Status | |
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| firefox95 | --- | fixed |
People
(Reporter: yury, Assigned: yury)
References
(Blocks 2 open bugs)
Details
Attachments
(1 file)
The ARM64 has VREV16/VREV32/VREV64 permute operations that are used in the wild. It will be nice to add them to the AnalyzeShuffle and generate single instruction for ARM64 (and somewhat efficient code for x86)
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Comment 1•4 years ago
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This seems like it doesn't need to make the train for FF90, so lowering priority.
Severity: S2 → N/A
Priority: P1 → P3
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Updated•4 years ago
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Assignee | |
Comment 2•3 years ago
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Updated•3 years ago
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Assignee: nobody → ydelendik
Status: NEW → ASSIGNED
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Assignee | |
Comment 3•3 years ago
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There was a win at reverseInt16x8 about 8% on my local benchmark on a x64 machine.
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Assignee | |
Comment 4•3 years ago
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On ARM64 platform, the local benchmark test 1-2% win for all added reverse ops.
Pushed by ydelendik@mozilla.com:
https://hg.mozilla.org/integration/autoland/rev/d453591e1259
Optimizations for SIMD reverse bytes ops. r=lth
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Comment 6•3 years ago
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| bugherder | ||
Status: ASSIGNED → RESOLVED
Closed: 3 years ago
status-firefox95:
--- → fixed
Resolution: --- → FIXED
Target Milestone: --- → 95 Branch
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Description
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