riscv64: build failure in media/libpng/riscv
Categories
(Core :: Graphics: ImageLib, defect)
Tracking
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| Tracking | Status | |
|---|---|---|
| firefox144 | --- | affected |
People
(Reporter: jseward, Unassigned)
Details
Attachments
(2 files)
On RiscV64 (Orange Pi RV2) I am seeing build failures with both clang and gcc
relating to the lack of vector extensions (SIMD) in the target, although I
believe the board does actually support them.
Building on the same machine about a month ago, using clang, there was no
failure.
A log of the error messages from gcc is attached. clang fails at the same
place, also complaining that the extension "zve32x" is not supported. But that
extension is listed in the /proc/cpuinfo output below.
Tested compilers:
gcc (Ubuntu 13.3.0-6ubuntu2~24.04) 13.3.0
Ubuntu clang version 18.1.3 (1ubuntu1)
Target: riscv64-unknown-linux-gnu
orangepi@orangepirv2:~/MOZ/M_GEN$ cat /proc/cpuinfo
processor : 0
hart : 0
model name : Ky(R) X1
isa : rv64imafdcv_zicbom_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zfhmin_zca_zcd_zba_zbb_zbc_zbs_zkt_zve32f_zve32x_zve64d_zve64f_zve64x_zvfh_zvfhmin_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt
mmu : sv39
uarch : ky,x60
mvendorid : 0x710
marchid : 0x8000000058000001
mimpid : 0x1000000049772200
# + the same repeated for the remaining 7 cores
| Reporter | ||
Comment 1•1 year ago
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| Reporter | ||
Comment 2•1 year ago
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Comment 3•1 year ago
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The rvv code just got added recently so that is likely the cause. Either how we integrated it is not correct (it was untested, so you might be our first tester of it) or the code in libpng still needs to mature more.
You should be able to disable it via these lines
https://searchfox.org/firefox-main/rev/e2cbda2dd0f622553b5c825f319832db4863f6a4/media/libpng/moz.build#87
I'd be interested to know if building libpng by itself also fails or not, to narrow down where the problem is.
Comment 4•1 year ago
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From https://gcc.gnu.org/onlinedocs/gcc-13.3.0/gcc/RISC-V-Options.html#index-march-14:
If both
-marchand-mcpu=are not specified, the default for this argument is system dependent, users who want a specific architecture extensions should specify one explicitly.
It seems that on the mentioned platform, RVV is not enabled by default in GCC.
Loong64 seems to explicitly enable LSX in GCC flags (https://searchfox.org/firefox-main/rev/e2cbda2dd0f622553b5c825f319832db4863f6a4/media/libpng/moz.build#80). Maybe we need to find a way to limit the base ISA to some profiles with V?
Comment 5•1 year ago
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At least, we have to add more compiler flag such as -march=rv64gcv. But gcc 13 lacks some vector types / built-in functions such as __riscv_vreinterpret_v_u8m1_b32.
Comment 6•1 year ago
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What about risv-v machines without the vector extensions? Do we need a config flag for rvv?
We can disable/enable on based on gcc version if we need to as well.
Comment 7•1 year ago
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Comment 8•1 year ago
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We can do that, here is an example
| Reporter | ||
Comment 9•1 year ago
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Thank you all for your comments. I should add that I managed to build
successfully overnight, and I wonder now if the failure was caused me not
correctly updating/rebasing my working directory after a jj git fetch.
This was using the system supplied clang,
Ubuntu clang version 18.1.3 (1ubuntu1).
The build does however crash (SIGILL) in what looks like JIT-generated code.
I have a disassembly of the failing code but haven't investigated further.
I will try further builds to see if the (build) problem persists. This may
take some time as (1) this isn't a priority for me and (2) a build on this
board takes around 15 hours.
If anybody has experience working with this board (Orange Pi RV2) I would be
interested to hear from you. In particular I have found the lack of support
for compressed swap (via zram) in the supplied kernel makes the build slower
and more difficult than it otherwise would be.
Comment 10•1 year ago
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The build does however crash (SIGILL) in what looks like JIT-generated code.
I have a disassembly of the failing code but haven't investigated further.
That sounds interesting. Would you like to provide the assembly in this bug entry or elsewhere? I don't currently have a Orange Pi RV2 on hand, but I could try and look for one.
| Reporter | ||
Comment 11•1 year ago
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(In reply to Rong Bao [:csmantle] from comment #10)
That sounds interesting. Would you like to provide the assembly in this bug entry or elsewhere?
I'll email it to you, so as not to clog up this bug with unrelated stuff.
Comment 12•1 year ago
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(In reply to Timothy Nikkel (:tnikkel) from comment #6)
What about risv-v machines without the vector extensions?
Most shipped SoC have no RVV 1.0 extension. This was an optional for RVA22.
Comment 13•1 year ago
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Anyway, moz.yaml doesn't import contrib/riscv-rvv/linux.c and Alibaba's chip has pre-1.0 vector implementation that is broken. So libpng removes runtime detection for it (https://github.com/pnggroup/libpng/commit/7916eb7ba08e97ac97c71784e15f78e3ffcd838c) to support Vector extension 1.0 only now.
| Reporter | ||
Comment 14•1 year ago
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FTR, this board (Orange Pi RV2) has 8 cores of "Ky X60", which are described at
https://www.spacemit.com/en/spacemit-x60-core as
"RVA22 64-bit RISC-V processor" and
"RISC-V Vector 1.0 Standard, providing 256-bit vector computing bandwidth"
Updated•1 year ago
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Description
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