2041055 - Prefer SignExtendWord instead of ExtractBits and use more pseudo-instructions

Status: RESOLVED FIXED

(Core :: JavaScript Engine: JIT, enhancement)

Comment 1

[André Bargull [:anba]]

Attachment: Bug 2041055 - Part 1: Remove unused InsertBits. r=iain!

Comment 2

[André Bargull [:anba]]

Attachment: Bug 2041055 - Part 2: Use SignExtendWord instead of ExtractBits in branchTestInt32Truthy. r=iain!

This matches ARM64 and requires only a single instruction.

Comment 3

[André Bargull [:anba]]

Attachment: Bug 2041055 - Part 3: Unbox boolean using SignExtendWord. r=iain!

This matches ARM32 and only requires a single instruction. Also update the
Address and BaseIndex overloads for consistency.

Similar to part 2.

Comment 4

[André Bargull [:anba]]

Attachment: Bug 2041055 - Part 4: Remove unused sign_extend parameter from ExtractBits. r=iain!

And rename rt to rd to match the normal conventions for riscv code.

Also removes an unused ExtractBits overload.

Comment 5

[André Bargull [:anba]]

Attachment: Bug 2041055 - Part 5: Move nop method to AssemblerRISCVI. r=iain!

Move nop to AssemblerRISCVI to allow using in that class.

Comment 6

[André Bargull [:anba]]

Attachment: Bug 2041055 - Part 6: Use mv pseudo-instruction instead of addi to move register. r=iain!

mv(rd, rs) is the pseudo-instruction for addi(rd, rs, 0).

Comment 7

[André Bargull [:anba]]

Attachment: Bug 2041055 - Part 7: Use compare pseudo-instructions and NegateBoolean more. r=iain!

Prefer the pseudo-instructions because they make the code more readable. Also
use the NegateBoolean helper in more cases.

Comment 8

[pstanciu]

https://hg.mozilla.org/mozilla-central/rev/ac6bb0ab9587
https://hg.mozilla.org/mozilla-central/rev/77fe005d91ec
https://hg.mozilla.org/mozilla-central/rev/24b1683d2ae2
https://hg.mozilla.org/mozilla-central/rev/14b48ecde953
https://hg.mozilla.org/mozilla-central/rev/b874d4a87f9d
https://hg.mozilla.org/mozilla-central/rev/1df15b833e28
https://hg.mozilla.org/mozilla-central/rev/14645c33b406