Closed Bug 2049942 Opened 4 months ago Closed 4 months ago

Use DisassemblerSpew for riscv64

Categories

(Core :: JavaScript Engine: JIT, enhancement)

enhancement

Tracking

()

RESOLVED FIXED
154 Branch
Tracking Status
firefox154 --- fixed

People

(Reporter: anba, Assigned: anba)

References

(Blocks 1 open bug)

Details

Attachments

(5 external files)

DisassemblerSpew supports tracking label identifiers, which makes reading the codegen jit spew much easier.

Example - Codegen jit spew for i ? 1 : 0 now prints:

[Codegen]                                 # LIR=TestIAndBranch
[Codegen] [h] 000048 00028063       beq       t0, zero, 0 -> 1003f
[Codegen] --------------------------------
[Codegen] [h]                  1004:
[Codegen]                                 # LIR=Integer
[Codegen] [h] 00004c 00100293       li        t0, 1
[Codegen]                                 # LIR=Goto
[Codegen] [h] 000050 0000006f       j         0 -> 1005f
[Codegen] --------------------------------
[Codegen] [h]                  1003:
[Codegen]                                 # LIR=Integer
[Codegen] [h] 000054 00000293       mv        t0, zero
[Codegen]                                 # LIR=Goto
[Codegen] --------------------------------
[Codegen] [h]                  1005:

Don't pass the implicit zero offset, so these methods don't require
changing when LabelDoc is added in part 2.

Pass LabelDoc to branch methods in preparation for part 4 when
DisassemblerSpew gets enabled for riscv64.

DisassemblerSpew adds a tracking id to its output to differentiate concurrent
assemblers. When using JitSpew(JitSpew_Codegen, ...), the DisassemblerSpew is
bypassed and no tracking id is emitted. To make the codegen jitspew less confusing
avoid JitSpew(JitSpew_Codegen, ...) and either replace it with comment(...) or
remove it altogether.

DisassemblerSpew supports tracking label identifiers, which makes reading the
codegen jit spew much easier.

Example - Codegen jit spew for i ? 1 : 0 now prints:

[Codegen]                                 # LIR=TestIAndBranch
[Codegen] [h] 000048 00028063       beq       t0, zero, 0 -> 1003f
[Codegen] --------------------------------
[Codegen] [h]                  1004:
[Codegen]                                 # LIR=Integer
[Codegen] [h] 00004c 00100293       li        t0, 1
[Codegen]                                 # LIR=Goto
[Codegen] [h] 000050 0000006f       j         0 -> 1005f
[Codegen] --------------------------------
[Codegen] [h]                  1003:
[Codegen]                                 # LIR=Integer
[Codegen] [h] 000054 00000293       mv        t0, zero
[Codegen]                                 # LIR=Goto
[Codegen] --------------------------------
[Codegen] [h]                  1005:

Part 4 changed disassembleInstr() to be a no-op when JS_DISASM_RISCV64 is not defined.

QA Whiteboard: [qa-triage-done-c155/b154]
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