Closed
Bug 527085
Opened 15 years ago
Closed 15 years ago
Nanojit should have 8/16 bit load-with-sign-extend operations
Categories
(Tamarin Graveyard :: Baseline JIT (CodegenLIR), defect)
Tamarin Graveyard
Baseline JIT (CodegenLIR)
Tracking
(Not tracked)
VERIFIED
DUPLICATE
of bug 527083
People
(Reporter: stejohns, Assigned: stejohns)
References
Details
Nanojit currently offers 8-bit and 16-bit load operations (ldcb and ldcs) that zero-extend, but no equivalent with sign-extend. We can simulate with the existing instructions + shifts, but since pretty much all interesting processors provide a single instruction to do this directly, it would be vastly more efficient to include this as a nanojit primitive.
Assignee | ||
Comment 1•15 years ago
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Scope creep: additionally, it really needs to provide volatile versions of the existing 8/18 load operations, since not all uses are likely to be CSE-able.
Assignee | ||
Comment 2•15 years ago
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Prototype patch for this is included in a patch for bug 527083.
Assignee | ||
Comment 3•15 years ago
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fixed as part of https://bugzilla.mozilla.org/show_bug.cgi?id=527083
Status: NEW → RESOLVED
Closed: 15 years ago
Resolution: --- → FIXED
Updated•15 years ago
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Assignee: nobody → stejohns
Updated•14 years ago
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Status: RESOLVED → VERIFIED
Resolution: FIXED → DUPLICATE
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Description
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