Closed Bug 671711 Opened 13 years ago Closed 13 years ago

cc is not a register


(NSS :: Build, defect, P1)



(Not tracked)



(Reporter: espindola, Assigned: espindola)




(1 file)

gcc accepts

  __asm__ ( "" : : : "%cc");

  __asm__ ( "" : : : "%memory");

but I couldn't find any documentation support for using % in here. It is only used for registers. Clang currently rejects those constructs.
Assignee: nobody → respindola
With this patch a build of m-c with clang just finished successfully.
This is a patch that we want to have on m-c as soon as possible to prevent build bustages.  If we can't do an NSS merge soon, we need to take this as a spot fix on m-c once it gets reviewed...
Should anyone else be cced on this? Is wtc the right person to review the patch? This bug is once again the only blocker to building with clang.
Comment on attachment 546050 [details] [diff] [review]
patch I am testing

Rafael: thank you for the patch.  I am not familiar with GCC inline assembly syntax,
so you need to explain why the change is correct.

For example, if cc is not a register (the Summary of this bug report), then what is cc?
Searching for "cc" in the file,
I found no occurrences of "cc" except in these macros.

A Bing search showed that "cc" refers to the condition code register (or condition
code flags) and can be used in the clobber list.  Is that correct?
It is used to represent the condition code. The only "documentation" I could find is a comment in varasm.c:

/* Decode an `asm' spec for a declaration as a register name.
   Return the register number, or -1 if nothing specified,
   or -2 if the ASMSPEC is not `cc' or `memory' and is not recognized,
   or -3 if ASMSPEC is `cc' and is not recognized,
   or -4 if ASMSPEC is `memory' and is not recognized.
   Accept an exact spelling or a decimal number.
   Prefixes such as % are optional.  */

I could not find exactly where in gcc -3 is used.
The % syntax nominally goes before a register, in this case cc, like "memory" isn't a true register it's just a way of specifying that the condition code registers for the target are clobbered. If you had a target with multiple condition code registers like ARM you wouldn't want to have to explicitly list each register. Therefore it isn't really a register that you'd prefix with % like you do the rest of the x86 registers. Also, for example, again on ARM you wouldn't really want to preface them with % at all there either.
cc'ing wtc so he sees the above comments
Comment on attachment 546050 [details] [diff] [review]
patch I am testing

r=wtc.  Thank you for the explanations.

Patch checked in on the NSS trunk (NSS 3.13) and
NSS_3_12_BRANCH (NSS 3.12.11).

Checking in mp_comba.c;
/cvsroot/mozilla/security/nss/lib/freebl/mpi/mp_comba.c,v  <--  mp_comba.c
new revision: 1.4; previous revision: 1.3

Checking in mp_comba.c;
/cvsroot/mozilla/security/nss/lib/freebl/mpi/mp_comba.c,v  <--  mp_comba.c
new revision:; previous revision: 1.3
Attachment #546050 - Flags: review?(wtc) → review+
Closed: 13 years ago
Priority: -- → P1
Resolution: --- → FIXED
Target Milestone: --- → 3.12.11
Can/should we backport this to m-c? When is the next nss merge planned to happen?
Ping. Can we backport this?
Rafael: please ask Brian Smith about the schedule of the NSS 3.12.11 release.
Brian, what is the schedule for the 3.12.11 release?

This bug currently blocks building with clang. I have hacked the version of clang we have on the bots, but having to hack the compiler instead of fixing our own code is not the ideal situation.
This will be fixed when it lands in m-c
Resolution: FIXED → ---
Closed: 13 years ago13 years ago
Resolution: --- → FIXED
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