We need to more agressively test how register spills are handled across our JIT. One way to achieve this effect is to carefully craft input tests and pray. A more effective way is to introduce specialized compilation mode(s) that limits the number of available registers to some minimal set where compilation can just barely hobble along but every temporary ends up being spilled to the stack. (There are further pathological testing modes one can imagine for other aspects of the JIT, e.g. testing that we handle large offsets into the stack frame properly. This is a just a good starting project with much expected bang-for-buck.)
There is a precedent in the PPC and MIPS backend, a compiler switch enables PEDANTIC mode. However it isn't used in testing (bad) and it's a headache because its a compiler switch. A runtime switch would be more useful.
Tamarin isn't maintained anymore. WONTFIX remaining bugs.
Status: NEW → RESOLVED
Last Resolved: a month ago
Resolution: --- → WONTFIX
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